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  absolute maximum ratings parameter units i d @ v gs = 10v, t c = 25c continuous drain current 1.8 i d @ v gs = 10v, t c = 100c continuous drain current 1.13 i dm pulsed drain current  7.2 p d @ t c = 25c max. power dissipation 14 w linear derating factor 0.11 w/c v gs gate-to-source voltage 20 v e as single pulse avalanche energy  0.242 mj i ar avalanche current  2.2 a e ar repetitive avalanche energy  1.4 mj dv/dt peak diode recovery dv/dt  4.0 v/ns t j operating junction -55 to 150 t stg storage temperature range pckg. mounting surface temp. 300 (for 5 s) weight 0.42 (typical) g the leadless chip carrier (lcc) package represents the logical next step in the continual evolution of surface mount technology. desinged to be a close replacement for the to-39 package, the lcc will give designers the extra flexibility they need to increase circuit board density. international rectifier has engineered the lcc package to meet the specific needs of the power market by increasing the size of the bottom source pad, thereby enhancing the thermal and electrical performance. the lid of the package is grounded to the source to reduce rf interference. c a  www.irf.com 1 features:  surface mount  small footprint  alternative to to-39 package  hermetically sealed  dynamic dv/dt rating  avalanche energy rating  simple drive requirements  light weight for footnotes refer to the last page repetitive avalanche and dv/dt rated hexfet ? transistors surface mount (lcc-18) irfe320 jantx2n6792u jantxv2n6792u ref:mil-prf-19500/555 400v, n-channel product summary part number b vdss r ds(on) i d irfe320 400v 1.8 ? 1.8a lcc-18 pd - 93985a
irfe320, jantx2n6792u, jantxv2n6792u 2 www.irf.com for footnotes refer to the last page note: corresponding spice and saber models are available on international rectifier website. source-drain diode ratings and characteristics parameter min typ max units test conditions i s continuous source current (body diode) ? ? 1.8 i sm pulse source current (body diode)  ? ? 7.2 v sd diode forward voltage ? ? 1.4 t j = 25c, i s =1.8a, v gs = 0v  t rr reverse recovery time ? ? 650 ns t j = 25c, i f = 1.8a, di/dt 100a/ s q rr reverse recovery charge ? ? 5.0 c v dd 50v  t on forward turn-on time intrinsic turn-on time is negligible. turn-on speed is substantially controlled by l s + l d . electrical characteristics @ tj = 25c (unless otherwise specified) parameter min typ max units t est conditions bv dss drain-to-source breakdown voltage 400 ? ? v v gs = 0v, i d = 1.0ma ? bv dss / ? t j temperature coefficient of breakdown ? 0.37 ? v/c reference to 25c, i d = 1.0ma voltage r ds(on) static drain-to-source on-state ? ? 1.8 v gs = 10v, i d = 1.13a  resistance ? ? 1.9 v gs =10v, i d = 1.8a  v gs(th) gate threshold voltage 2.0 ? 4.0 v v ds = v gs , i d = 250a g fs forward transconductance 1.0 ? ? s v ds > 15v, i ds = 1.13a  i dss zero gate voltage drain current ? ? 25 v ds = 320v, v gs = 0v ? ? 250 v ds = 320v v gs = 0v, t j = 125c i gss gate-to-source leakage forward ? ? 100 v gs = 20v i gss gate-to-source leakage reverse ? ? -100 v gs = -20v q g total gate charge ? ? 22 v gs = 10v, i d = 1.8a q gs gate-to-source charge ? ? 3.0 nc v ds = 200v q gd gate-to-drain (?miller?) charge ? ? 14 t d (on) turn-on delay time ? ? 40 v dd = 125v, i d = 1.8a t r rise time ? ? 35 v gs = 10v, r g = 7.5 ? t d (off) turn-off delay time ? ? 60 t f fall time ? ? 35 l s + l d total inductance ? 6.1 ? c iss input capacitance ? 350 v gs = 0v, v ds = 25v c oss output capacitance ? 100 ? p f f = 1.0mhz c rss reverse transfer capacitance ? 45 ? na nh ns a ? measured from the center of drain pad to center of source pad thermal resistance parameter min typ max units t est conditions r thjc junction to case ? ? 8.93 r thj-pcb junction to pc board ? ? 26   soldered to a copper clad pc board c/w a v
www.irf.com 3 irfe320, jantx2n6792u, jantxv2n6792u fig 4. normalized on-resistance vs. temperature fig 2. typical output characteristics fig 1. typical output characteristics fig 3. typical transfer characteristics
irfe320, jantx2n6792u, jantxv2n6792u 4 www.irf.com fig 8. maximum safe operating area fig 6. typical gate charge vs. gate-to-source voltage fig 5. typical capacitance vs. drain-to-source voltage fig 7. typical source-drain diode forward voltage 13 a & b
www.irf.com 5 irfe320, jantx2n6792u, jantxv2n6792u fig 10a. switching time test circuit v ds 90% 10% v gs t d(on) t r t d(off) t f fig 10b. switching time waveforms   
 1     0.1 %      


v gs + -   fig 11. maximum effective transient thermal impedance, junction-to-case fig 9. maximum drain current vs. case temperature
irfe320, jantx2n6792u, jantxv2n6792u 6 www.irf.com q g q gs q gd v g charge d.u.t. v ds i d i g 3ma v gs .3 f 50k ? .2 f 12v current regulator same type as d.u.t. current sampling resistors + -  fig 13b. gate charge test circuit fig 13a. basic gate charge waveform fig 12c. maximum avalanche energy vs. drain current fig 12b. unclamped inductive waveforms fig 12a. unclamped inductive test circuit t p v (br)dss i as r g i as 0.01 ? t p d.u.t l v ds + - v dd driver a 15v 20v v gs
www.irf.com 7 irfe320, jantx2n6792u, jantxv2n6792u foot notes:  i sd 1.8a, di/dt 65a/ s, v dd 400v, t j 150c suggested rg =7.5 ?  pulse width 300 s; duty cycle 2%  repetitive rating; pulse width limited by maximum junction temperature.  v dd = 50v, starting t j = 25c, peak i l = 2.2a, l = 100 h ir world headquarters: 233 kansas st., el segundo, california 90245, usa tel: (310) 252-7105 ir leominster : 205 crawford st., leominster, massachusetts 01453, usa tel: (978) 534-5776 tac fax: (310) 252-7903 visit us at www.irf.com for sales contact information . data and specifications subject to change without notice. 08/2007 case outline and dimensions ? lcc-18


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